UpZide and Tensilica to Cooperate on VDSL2 Data-Path Design; Solution to Provide HDTV Bandwidth Over Phone Lines
UpZide Labs AB and Tensilica(R), Inc., announced a development agreement in the area of VDSL2 data-path design. Under the agreement, UpZide will develop a reference design utilizing multiple Xtensa(R) LX processors from Tensilica to implement the VDSL2 (second generation Very high-speed Digital Subscriber Line) standard. Because the standard is evolving, it's essential that the VDSL2 data-path component be designed with the flexibility required to adapt to all possible changes. By designing with highly configurable Xtensa processors rather than RTL (register transfer level code), and by extending the instruction set to handle the data-intensive demands of the VDSL2 standard, UpZide will be able to make available for license a fast, efficient, and programmable solution for this rapidly growing market.
The VDSL2 standard provides broadband connections at speeds of up to 100 Mbps symmetrical, which is fast enough to deliver the "triple play" applications of voice, data and video to a wide audience. This technology is seen as key to delivering VoIP (voice over Internet protocol), VoD (video on demand) and HDTV (high-definition television) simultaneously over standard telephone lines.
"The evolving VDSL2 standard puts extreme requirements on system-on-chip designs; some can even be considered contradictory," according to UpZide's CEO, Dr. Mikael Isaksson. "Compared to existing VDSL, VDSL2 must offer both longer range and support the delivery of higher bandwidth services at low production costs, high port density and low power consumption. Tensilica's Xtensa processors will allow us to deliver these challenging requirements along with the flexibility inherent in a programmable solution.
"UpZide brings to the partnership unique expertise gained from designing several VDSL platforms in various semiconductor technologies, including FPGAs, ASICs and DSPs, since 1995. Tensilica's Xtensa processors are ideal for this project because they can be optimised precisely for this application, making them much faster and energy efficient than standard control processors, enabling UpZide to design a processor-based solution with the power-area efficiency previously only attainable with hard-coded RTL design methodologies," Dr. Isaksson added.
"VDSL2 design is challenging. It needs to be processor-based so it can be future proof to quickly respond to changes in standards and to different customer requirements," stated Steve Roddy, vice president of marketing at Tensilica. "That's why we're happy to support UpZide's VDSL2 design efforts. Their extensive expertise with VDSL should give them a head start in the VDSL2 market."
About UpZide
Based in Sweden, UpZide's core business is to offer embedded software, system-on-chip designs and expert services to chipset manufacturers and system integrators, enabling them to enter the market with standard compliant communication system solutions. UpZide was founded in 2001 by the key individuals that developed the Zipper DMT technology, a concept that is currently a cornerstone of the international VDSL standard, as well as the evolving VDSL2 standard. See www.upzide.com.
About Tensilica
Tensilica was founded in July 1997 to address the growing need for optimized, application-specific microprocessor solutions in high-volume embedded applications. With a configurable and extensible microprocessor core called Xtensa, Tensilica is the only company that has automated and patented the time-consuming process of generating a customized microprocessor core along with a complete software development tool environment, producing new configurations in a matter of hours. For more information, visit www.tensilica.com.
